1. Field of the Invention
The present invention relates to a method of forming a semiconductor integrated circuit, and more particularly to a trench isolation in a semiconductor integrated circuit.
2. Description of the Related Art
Isolations for electrically isolating semiconductor devices are important for the semiconductor integrated circuit with a high withstand voltage. It was known that one or more trench isolations are formed in a silicon-on-insulator substrate. In the semiconductor integrated circuit with the high withstand voltage, a depth of the semiconductor devices may reach a few micrometers, for which reason it is necessary that the trench depth is ranged from a few micrometers to 10 micrometers.
Japanese laid-open patent publication No. 8-23027 discloses that TEOS(Tetra Etyl Ortho Silicate)-SiO2 is filled within a trench groove in the silicon-on-insulator substrate. FIGS. 1A through 1D are fragmentary cross sectional elevation views illustrative of trench isolations in silicon-on-insulator substrates in sequential steps involved in a first conventional method.
With reference to FIG. 1A, a silicon-on-insulator substrate 20 is prepared, wherein the silicon-on-insulator substrate 20 comprises first and second silicon substrates 11 and 12 and a buried insulating layer 13 sandwiched between the first and second silicon substrates 11 and 12. A surface of the first silicon substrate 11 is subjected to a thermal oxidation to form an oxide film 14.
With reference to FIG. 1B, a photo-resist film is applied on the oxide film 14. The photo-resist film is patterned by a photo-lithography technique to form a photo-resist mask on the oxide film 14. The photoresist mask is used as an etching mask for carrying out an anisotropic etching for selectively etching the oxide film 14, so that a part of the surface of the first silicon substrate 11 is exposed. A reactive ion etching process is then carried out for selectively etching the first silicon substrate 11 to form a trench groove 15 in the first silicon substrate 11, wherein the trench groove 15 reaches the buried insulating layer 13.
With reference to FIG. 1C, a chemical vapor deposition process is carried out using a TEOS gas to deposit a TEOS-SiO2 film 16 both within the trench groove 15 and over the oxide film 14, whereby the trench groove 15 is completely filled with the TEOS-SiO2 film 16.
With reference to FIG. 1D, the TEOS-SiO2 film 16 is then subjected to an etch-back so that the thickness of the TEOS-SiO2 film 16 over the oxide film 14 becomes a predetermined thickness “d”. Optionally, the etch-back may be made until the surface of the oxide film 14 is exposed and the TEOS-SiO2 film 16 remains only within the trench groove 15. Alternatively, the etch-back may be made until the surface of the first silicon substrate 11 is exposed and the TEOS-SiO2 film 16 remains only within the trench groove 15.
As described above, the TEOS-SiO2 film 16 is deposited by the chemical vapor deposition process using the TEOS gas. This TEOS-SiO2 film 16 has a large surface migration and a good surface coverage. In the chemical vapor deposition process, the TEOS-SiO2 film 16 is deposited with substantially keeping a thickness uniformity on side walls and a bottom of the trench groove 15 and over the oxide film 14. Namely, in the chemical vapor deposition process, the thickness of the TEOS-SiO2 film 16 is increased with keeping the thickness uniformity on side walls and a bottom of the trench groove 15 and over the oxide film 14. For this reason, an upper surface of the TEOS-SiO2 film 16 as deposited has a generally V-shaped hollow portion which is positioned over the trench groove 15. As shown in FIG. 1D, the generally V-shaped hollow portion remains after the etch back process. Therefore, it is difficult to obtain a planarized top surface of the TEOS-SiO2 film 16.
In a later process, a metal interconnection layer is once entirely formed over the entire surface of the TEOS-SiO2 film 16, and then the metal interconnection layer is patterned or selectively removed to form an interconnection extending over the TEOS-SiO2 film 16. It is possible that the metal interconnection layer resides within the TEOS-SiO2 film 16. This residual metal in the generally V-shaped hollow portion may cause a short circuit between interconnections. If a tapered angle of the generally V-shaped hollow portion is larger than 20 degrees, it is highly possible that the metal interconnection layer resides within the TEOS-SiO2 film 16.
Japanese laid-open patent publication No. 8-23027 discloses that TEOS(Tetra Etyl Ortho Silicate)-SiO2 is filled within a trench groove in the silicon-on-insulator substrate. FIGS. 2A through 2D are fragmentary cross sectional elevation views illustrative of trench isolations in silicon-on-insulator substrates in sequential steps involved in a second conventional method.
With reference to FIG. 2A, a silicon-on-insulator substrate 20 is prepared, wherein the silicon-on-insulator substrate 20 comprises first and second silicon substrates 11 and 12 and a buried insulating layer 13 sandwiched between the first and second silicon substrates 11 and 12. A surface of the first silicon substrate 11 is subjected to a thermal oxidation to form an oxide film 14.
With reference to FIG. 2B, a photo-resist film is applied on the oxide film 14. The photo-resist film is patterned by a photo-lithography technique to form a photo-resist mask on the oxide film 14. The photoresist mask is used as an etching mask for carrying out an anisotropic etching for selectively etching the oxide film 14, so that a part of the surface of the first silicon substrate 11 is exposed. A reactive ion etching process is then carried out for selectively etching the first silicon substrate 11 to form a trench groove 15 in the first silicon substrate 11, wherein the trench groove 15 reaches the buried insulating layer 13.
With reference to FIG. 2C, a chemical vapor deposition process is carried out using a TEOS gas to deposit a TEOS-BPSG film 17 both within the trench groove 15 and over the oxide film 14, whereby the trench groove 15 is completely filled with the TEOS-BPSG film 17. The TEOS-BPSG film 17 is deposited by the chemical vapor deposition process using the TEOS gas. An upper surface of the TEOS-BPSG film 17 as deposited has a generally V-shaped hollow portion which is positioned over the trench groove 15. Further, it is possible that a void 19 is formed in the TEOS-BPSG film 17 in the trench groove 15.
With reference to FIG. 2D, a heat treatment is carried out at about 900° C. to cause a re-flow of the TEOS-BPSG film 17 for the purpose of planarizing the generally V-shaped hollow portion on the surface of the TEOS-BPSG film 17. The re-flow of the TEOS-BPSG film 17 also causes a size reduction of the void 19, even the void 19 does not disappear.
With reference to FIG. 2E, the TEOS-BPSG film 17 is then subjected to an etch-back so that the thickness of the TEOS-BPSG film 17 over the oxide film 14 becomes a predetermined thickness “Z”. Optionally, the etch-back may be made until the surface of the oxide film 14 is exposed, and the TEOS-BPSG film 17 remains only within the trench groove 15. Alternatively, the etch-back may be made until the surface of the first silicon substrate 11 is exposed and the TEOS-BPSG film 17 remains only within the trench groove 15.
As described above, the TEOS-BPSG film 17 is deposited by the chemical vapor deposition process using the TEOS gas. This TEOS-BPSG film 17 has a small surface migration and a low surface coverage. For this reason, in the chemical vapor deposition process, the TEOS-BPSG film 17 is deposited without keeping a thickness uniformity on side walls and a bottom of the trench groove 15 and over the oxide film 14. Namely, in the chemical vapor deposition process, the thickness of the TEOS-BPSG film 17 adjacent to an opening edge of the trench groove 15 is larger than the other portions thereof. This may cause the void 19 in the TEOS-BPSG film 17 in the trench groove 15. The void 19 deteriorates the trench isolation. Further, a residual gas in the void 19 may be expanded in the later heat treatment, whereby it is possible that the trench isolation is broken.
In the above circumstances, the development of a novel method of forming a trench isolation in a substrate free from the above problems is desirable.